# Fundamentals of Digital Logic with Verilog Design #### Subscribe! ## Fundamentals of Digital Logic with Verilog Design 3rd edition Solutions Manual

##### (Electrical Engineering) Edition: 3rd edition Author: Crazy for study ISBN: 9780073380544

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Sample questions asked in the 3rd edition of Fundamentals of Digital Logic with Verilog Design:

Convert the decimal numbers 73, 1906, -95, and -1630 into signed 12-bit numbers in the following representations: (a) Sign and magnitude (b) 1's complement (c) 2's complement

(a) Show the location of all minterms in a three-variable Venn diagram. (b) Show a separate Venn diagram for each product term in the function Use the Venn diagram to find the minimal sum-of-products form off.

In Figure 3.69 we showed a solution to the static power dissipation problem when NMOS pass transistors are used. Assume that the PMOS pull-up transistor is removed from this circuit. Assume the parameters W n /L n = 1.0 ? m/0.25 ? m, W p /L p = 2.0 ? m/0.25 ? m, V DD = 2.5 V, and V T = 0.6 V. For V B = 1.6 V, calculate the following: (a) the static current, I stat (b) the voltage, V f , at the output of the inverter (c) the static power dissipation in the inverter (d) If a chip contains 500,000 inverters used in this manner, find the total static power dissipation.

(a) For the ASM chart derived in problem 10.18, show another ASM chart that specifies the required control signals to control the datapath circuit. Assume that multiplexers are used to implement the bus that connects the registers, as shown in Figure 7.65. (b) Write complete Verilog code for the system in problem 10.18, including the control circuit described in Part ( a ). (C) Synthesize a circuit from the Verilog code written in part ( b ) and show a timing simulation that illustrates correct functionality of the circuit.
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